Changeset 5bcd9b9
 Timestamp:
 Nov 15, 2018, 2:21:33 AM (6 years ago)
 Branches:
 feature/autosink, feature/cnn, feature/cnn_org, feature/constantq, feature/crepe, feature/crepe_org, feature/pitchshift, feature/pydocstrings, feature/timestretch, fix/ffmpeg5, master
 Children:
 5999ff2
 Parents:
 5a703bd
 File:

 1 edited
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 Unmodified
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src/spectral/fft.c
r5a703bd r5bcd9b9 90 90 #define aubio_vDSP_vsadd vDSP_vsadd 91 91 #define aubio_vDSP_vsmul vDSP_vsmul 92 #define aubio_vDSP_create_fftsetup vDSP_create_fftsetup93 #define aubio_vDSP_destroy_fftsetup vDSP_destroy_fftsetup94 92 #define aubio_DSPComplex DSPComplex 95 93 #define aubio_DSPSplitComplex DSPSplitComplex 96 #define aubio_FFTSetup FFTSetup 94 #define aubio_vDSP_DFT_Setup vDSP_DFT_Setup 95 #define aubio_vDSP_DFT_zrop_CreateSetup vDSP_DFT_zrop_CreateSetup 96 #define aubio_vDSP_DFT_Execute vDSP_DFT_Execute 97 #define aubio_vDSP_DFT_DestroySetup vDSP_DFT_DestroySetup 97 98 #define aubio_vvsqrt vvsqrtf 98 99 #else … … 104 105 #define aubio_vDSP_vsadd vDSP_vsaddD 105 106 #define aubio_vDSP_vsmul vDSP_vsmulD 106 #define aubio_vDSP_create_fftsetup vDSP_create_fftsetupD107 #define aubio_vDSP_destroy_fftsetup vDSP_destroy_fftsetupD108 107 #define aubio_DSPComplex DSPDoubleComplex 109 108 #define aubio_DSPSplitComplex DSPDoubleSplitComplex 110 #define aubio_FFTSetup FFTSetupD 109 #define aubio_vDSP_DFT_Setup vDSP_DFT_SetupD 110 #define aubio_vDSP_DFT_zrop_CreateSetup vDSP_DFT_zrop_CreateSetupD 111 #define aubio_vDSP_DFT_Execute vDSP_DFT_ExecuteD 112 #define aubio_vDSP_DFT_DestroySetup vDSP_DFT_DestroySetupD 111 113 #define aubio_vvsqrt vvsqrt 112 114 #endif /* HAVE_AUBIO_DOUBLE */ … … 153 155 154 156 #elif defined HAVE_ACCELERATE // using ACCELERATE 155 int log2fftsize;156 aubio_ FFTSetup fftSetup;157 aubio_vDSP_DFT_Setup fftSetupFwd; 158 aubio_vDSP_DFT_Setup fftSetupBwd; 157 159 aubio_DSPSplitComplex spec; 158 160 smpl_t *in, *out; … … 211 213 212 214 #elif defined HAVE_ACCELERATE // using ACCELERATE 215 { 216 uint_t radix = winsize; 217 uint_t order = 0; 218 while ((radix / 2) * 2 == radix) { 219 radix /= 2; 220 order++; 221 } 222 if (order < 4  (radix != 1 && radix != 3 && radix != 5 && radix != 15)) { 223 AUBIO_ERR("fft: vDSP/Accelerate supports FFT with sizes = " 224 "f * 2 ** n, where n > 4 and f in [1, 3, 5, 15], but requested %d. " 225 "Use the closest power of two, or try recompiling aubio with " 226 "enablefftw3.\n", winsize); 227 goto beach; 228 } 229 } 213 230 s>winsize = winsize; 214 231 s>fft_size = winsize; 215 232 s>compspec = new_fvec(winsize); 216 s>log2fftsize = aubio_power_of_two_order(s>fft_size);217 233 s>in = AUBIO_ARRAY(smpl_t, s>fft_size); 218 234 s>out = AUBIO_ARRAY(smpl_t, s>fft_size); 219 235 s>spec.realp = AUBIO_ARRAY(smpl_t, s>fft_size/2); 220 236 s>spec.imagp = AUBIO_ARRAY(smpl_t, s>fft_size/2); 221 s>fftSetup = aubio_vDSP_create_fftsetup(s>log2fftsize, FFT_RADIX2); 237 s>fftSetupFwd = aubio_vDSP_DFT_zrop_CreateSetup(NULL, 238 s>fft_size, vDSP_DFT_FORWARD); 239 s>fftSetupBwd = aubio_vDSP_DFT_zrop_CreateSetup(s>fftSetupFwd, 240 s>fft_size, vDSP_DFT_INVERSE); 222 241 223 242 #elif defined HAVE_INTEL_IPP // using Intel IPP … … 293 312 AUBIO_FREE(s>spec.realp); 294 313 AUBIO_FREE(s>spec.imagp); 295 aubio_vDSP_destroy_fftsetup(s>fftSetup); 314 aubio_vDSP_DFT_DestroySetup(s>fftSetupBwd); 315 aubio_vDSP_DFT_DestroySetup(s>fftSetupFwd); 296 316 297 317 #elif defined HAVE_INTEL_IPP // using Intel IPP … … 351 371 aubio_vDSP_ctoz((aubio_DSPComplex*)s>in, 2, &s>spec, 1, s>fft_size/2); 352 372 // compute the FFT 353 aubio_vDSP_fft_zrip(s>fftSetup, &s>spec, 1, s>log2fftsize, FFT_FORWARD); 373 aubio_vDSP_DFT_Execute(s>fftSetupFwd, s>spec.realp, s>spec.imagp, 374 s>spec.realp, s>spec.imagp); 354 375 // convert from vDSP complex split to [ r0, r1, ..., rN, iN1, .., i2, i1] 355 376 compspec>data[0] = s>spec.realp[0]; … … 419 440 aubio_vDSP_ctoz((aubio_DSPComplex*)s>out, 2, &s>spec, 1, s>fft_size/2); 420 441 // compute the FFT 421 aubio_vDSP_fft_zrip(s>fftSetup, &s>spec, 1, s>log2fftsize, FFT_INVERSE); 442 aubio_vDSP_DFT_Execute(s>fftSetupBwd, s>spec.realp, s>spec.imagp, 443 s>spec.realp, s>spec.imagp); 422 444 // convert result to real output 423 445 aubio_vDSP_ztoc(&s>spec, 1, (aubio_DSPComplex*)output>data, 2, s>fft_size/2);
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